CALCULATORS / PCB INTERCONNECT AND PACKAGING

Interconnect propagation and length matching calculator

Quasi-TEM delay using supplied effective dielectric constant.

pcb-propagation-delay.napkin / editable
✓ checks pass

SCENARIO COMPARISON

Compare the numbers.

This source describes an analytical model. Its quantities and checks are the view.

Scenariodelayns
0.57775
0.4622

All calculated quantities are listed with the inputs. Switch to Source to inspect the equations.

SCENARIOS / CALCULATED VALUESSAME SOURCE

Change an input to see the consequences.

delay budget0.58 ns✓ passes

BASELINE INPUTS

CALCULATED

delay0.57775 ns

Edits change the baseline source.

Calculated from your source · not saved
Baseline · Baseline
delay budget0.58 ns ✓ passes
alternative · alternative
delay budget0.46 ns ✓ passes

Illustrative first-order example. Checks are editable requirements, not design standards. The broader topic may require additional equations, data, and validation.

Formula and units

This example uses the following equations. Input names and units match the editable source above.

delay
delay = length*sqrt(effectivePermittivity)/lightSpeed [ns]

Original worked example

These are the baseline values in the downloadable source. Edits above let you test your own values.

Given

length
100 mm
effective permittivity
3
light speed
299792000 m/s

Calculated

delay
0.57775 ns

Assumptions and limits

Quasi-TEM delay using supplied effective dielectric constant.

The requirement checks use the limits written in this example. Passing a check does not establish that the model covers every load, material behavior, or operating condition in a real design.

Download this .napkin example ↓

Take it further with your agent

Napkin keeps the inputs, equations, checks and assumptions together in one study. Your agent sets it up; you change the numbers.

Try with Claude ↗

codex 'Use Napkin (https://napkin.engineering/mcp, or the local Napkin plugin) to build a study: Interconnect propagation and length matching. Inputs: trace lengths; effective permittivity; timing budget. Outputs: delay; skew; allowable mismatch. Model scope: Explicit stackup and trace/via geometry; empirical models identified. Read napkin_capabilities and the current snapshot. Ask me for the values that matter, label assumptions with units, author .napkin source, validate it and apply it with napkin_source using the current revision, then open the study. Add checks for the limits I supply. Keep unsupported analyses explicit.'

Claude needs the Napkin connector; Codex needs the Napkin plugin. Set up your agent ↗

The broader study

The topic brief below describes the broader scope. The worked example above states the particular calculation it implements.

  • Inputs: trace lengths, effective permittivity, timing budget
  • Outputs: delay, skew, allowable mismatch
  • Modes: calculate, compare, sweep
  • Drawing: Layer viewer and cross section

EXECUTABLE WORKED EXAMPLE · FIRST-ORDER MODEL · CHECK THE SCOPE & ASSUMPTIONS

More in pcb interconnect and packaging